1. Field of the Invention
The present invention relates to systems for processing very large scale integration (VLSI) physical designs. More particularly, it relates to a method for increasing access and control over hierarchical information in a shape processing system used in VLSI.
2. Prior Art
Current systems for processing VLSI physical designs exploit the nested, hierarchical structure of such designs to reduce the time and storage requirements for shape processing operations. Although the details of the hierarchical processing are usually not disclosed to the user, it is occasionally desirable to provide access to and control over the handling of a design's hierarchical structure. Such access and control provides the user with the ability to optimize performance of the shape-processing application.
With the shape processing systems of the prior art, the degree of hierarchical access and control are generally limited. Examples of such systems are the NIAGARA Extensible Shapes Processor and the Avanti! (formerly ISS) Hercules.TM.. The NIAGARA system provides two modes for hierarchical processing, (1) cellwise mode, and (2) Full mode. In cellwise mode, the shapes of each cell of a hierarchical design are considered in isolation, and the possible interaction with shapes in other cells are ignored. In the Full mode, all possible shape interactions are considered.
The advantage to processing in cellwise mode is that it can potentially reduce storage and execution times by effectively partitioning the design into subdesigns (one per cell), processing the subdesigns independently, and then combining the results. The ability to select cellwise vs. full mode can be provided to the application programmer in several ways. For example, a global specification (e.g., via a command-line argument) can be used to indicate that all operations in a particular run of a shape-processing application are to be performed in either cellwise or full mode. In another example, a statement-by-statement specification can be used to indicate that particular operations are to be performed in one or the other of the two modes.